SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that the Cadence® Pegasus™ Verification System is now qualified for the GlobalFoundries® (GF®) 12LP/12LP+ and 22FDX™ technologies. The collaboration with GF confirmed that the Pegasus Verification System meets the rigorous accuracy and runtime targets customers have come to expect with physical verification for these advanced GF nodes. GF-qualified rule decks are now available to help customers who are designing and taping out hyperscale, aerospace, 5G communications, consumer and automotive applications ramp up quickly.
The Pegasus Verification System offers several benefits to customers designing on GF 12LP/12LP+ and 22FDX technologies. Architected from the ground up to provide massively scalable runs, the Pegasus Verification System provides fast turnaround times and more predictable design cycle times with design rule checks (DRC), layout versus schematic (LVS), metal fill and design-for-manufacturing (DFM) . It features tight in-design integration with Cadence’s Innovus™ Implementation System and Virtuoso® platform, providing improved productivity and checks throughout the implementation flow. Also, designers can easily fulfill mandatory DFM requirements by leveraging integrated hotspot detection with seamless automated fixing. For more information on the Pegasus Verification System, please visit www.cadence.com/go/pegasusgfpr.
“Our collaboration with Cadence helps ensure that customers can use the qualified Pegasus Verification System to create high-quality designs in high-growth markets using our 12LP/12LP+ and 22FDX platforms,” said Richard Trihy, vice president of customer design enablement at GF. “Through the availability of the collateral, we’re also giving customers a fast path to adoption so they can quickly start reaping the benefits of our technologies.”
“Cadence and GF worked together on the Pegasus Verification System qualification to provide customers with added confidence that they can achieve DRC, LVS, metal fill and mandatory DFM requirements on GF’s advanced technologies and get to market faster,” said Michael Jackson, corporate vice president, R&D in the Digital & Signoff Group at Cadence. “The Pegasus Verification System provides customers with a compelling offering, given its massive scalability and tight integration with Innovus Implementation and the Virtuoso platform, providing faster physical verification cycles and shorter iterations, which enables them to stay in front of the competition.”
The Pegasus Verification System is part of the broader Cadence digital full flow, which provides optimal power, performance and area (PPA) with a faster path to design closure and supports Cadence’s Intelligent System Design™ strategy, enabling SoC design excellence.
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For seven years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.
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