SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) announced today that it has completed the previously announced acquisition of the SerDes and memory interface PHY IP business from Rambus Inc. With the continued proliferation of AI, data center and hyperscale applications, CPU architectures, and networking devices, the technology asset purchase enriches Cadence’s established IP portfolio and augments the company’s Intelligent System Design™ strategy, which drives design excellence. The acquisition also comes with the addition of experienced PHY engineering teams in the United States, India and Canada, further expanding Cadence’s domain-rich talent base.
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence® customers are the world’s most innovative companies, delivering extraordinary products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For nine years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at www.cadence.com.
This press release contains “forward-looking statements” within the meaning of the “safe harbor” provisions of the Private Securities Litigation Reform Act of 1995, including but not limited to, statements regarding Cadence’s product development, business strategy and industry trends and talent base. These forward-looking statements are based on current expectations, estimates, forecasts and projections. Words such as “expect,” “anticipate,” “should,” “believe,” “hope,” “target,” “project,” “goals,” “estimate,” “potential,” “predict,” “may,” “will,” “might,” “could,” “intend,” “shall” and variations of these terms and similar expressions are intended to identify these forward-looking statements, although not all forward-looking statements contain these identifying words. These forward-looking statements are subject to a number of risks, uncertainties and other factors, many of which are outside Cadence’s control. For example, the market for Cadence’s products may develop more slowly than expected or than it has in the past; Cadence’s operating results may fluctuate more than expected, there may be significant fluctuations in Cadence’s results of operations and cash flows related to Cadence’s revenue recognition or otherwise; a network or data security incident that allows unauthorized access to Cadence’s network or data or Cadence’s customers’ data could damage Cadence’s reputation; risks associated with tax liabilities or changes in U.S. federal tax laws or interpretations to which the acquisition or parties thereto are subject; Cadence may fail to successfully integrate the Rambus SerDes and memory interface PHY IP business (the “Business”); Cadence may fail to realize the anticipated benefits of any combined operations with the Business; Cadence may experience unanticipated costs of integrating the Business; the potential impact of the acquisition on relationships with third parties, including employees, customers, partners and competitors; Cadence may be unable to retain key personnel; changes in legislation or government regulations could affect the Business; and global economic conditions could deteriorate. Further information on potential factors that could affect Cadence’s ability to successfully integrate the Business or otherwise realize the anticipated benefits of the acquisition is included in Cadence’s most recent reports on Form 10-K and Form 10-Q and Cadence’s other filings with the Securities and Exchange Commission. The forward-looking statements included in this press release represent Cadence’s views as of the date of this press release, and Cadence undertakes no obligation to update any forward-looking statement in this press release.
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