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Cadence Demonstrates Interoperability with SK hynix’s Highest Speed LPDDR5T Mobile DRAM at 9600Mbps

Complete high-performance memory controller and PHY solution is future-proofed for future memory

SAN JOSE, Calif.--(BUSINESS WIRE)--Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that it has demonstrated interoperability between the silicon-proven Cadence® LPDDR5X memory interface IP and SK hynix’s LPDDR5T (Turbo) mobile DRAM, operating at speeds in excess of the LPDDR5X standard. This milestone follows Cadence’s earlier announcement of the first LPDDR5X memory interface IP design operating at 8533Mbps and SK hynix’s first announcement of its LPDDR5T mobile DRAM technology operating at 9600Mbps.

Available now for customer engagements, the Cadence LPDDR5X IP boasts a new high-performance, scalable and adaptable architecture based on Cadence’s proven and highly successful LPDDR5 and GDDR6 product lines. The complete, high-performance memory controller and PHY solution is future proofed for future memory, and Cadence’s leading design techniques and flexibility enable the introduction of new memory devices into the system and achieve interoperability with excellent system margins.

“SK hynix’s LPDDR5 Turbo mobile DRAM opens up new possibilities beyond smartphones, to AI, machine learning and augmented/virtual reality,” said Sungsoo Ryu, VP of DRAM product planning at SK hynix. “Proving interoperability with Cadence’s memory interface IP is a key step in enabling customers targeting 9600Mbps operation.”

“Cadence LPDDR5X design IP implements the highest performance signal-boosting design techniques,” noted Sanjive Agarwala, corporate vice president and general manager of the IP Group at Cadence. “The result is that we can demonstrate wide-open data eyes with a large amount of system margin when operating with SK hynix’s 9600Mbps mobile DRAM.”

The LPDDR5X IP supports Cadence’s Intelligent System Design strategy, which enables SoC design excellence with high-performance, design-optimized, best-in-class technology. For more information on the LPDDR5X IP, please visit www.cadence.com/go/lpddr5x.

About Cadence
Cadence is a pivotal leader in electronic systems design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to complete systems for the most dynamic market applications, including hyperscale computing, 5G communications, automotive, mobile, aerospace, consumer, industrial and healthcare. For nine years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.

© 2023 Cadence Design Systems, Inc. All rights reserved worldwide. Cadence, the Cadence logo and the other Cadence marks found at www.cadence.com/go/trademarks are trademarks or registered trademarks of Cadence Design Systems, Inc. All other trademarks are the property of their respective owners.

Category: Featured

Contacts

For more information, please contact:
Cadence Newsroom
408-944-7039
newsroom@cadence.com

Cadence Design Systems, Inc.

NASDAQ:CDNS
Details
Headquarters: San Jose, California
CEO: Anirudh Devgan
Employees: 12700
Organization: PUB
Revenues: 4.641 Billion (2024)
Net Income: 1.055 Billion (2024)

Release Summary
Cadence demonstrated interoperability between the silicon-proven Cadence LPDDR5X memory interface IP and SK hynix’s LPDDR5T (Turbo) mobile DRAM.
Release Versions

Contacts

For more information, please contact:
Cadence Newsroom
408-944-7039
newsroom@cadence.com

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