OXFORD, England--(BUSINESS WIRE)--Imperas™ today announces the release of Open Virtual Platforms™ (OVP™) Fast Processor Models for popular ARM® cores: Cortex®-A17, Cortex®-M0, Cortex®-M0+, and Cortex®-M1. Also announced are changes to the terms of licensing of the OVP ARM Models.
New Extendable Platform Kits™ (EPKs™) of ARM-based devices are available from Imperas, working together with the M*SDK™ tools, to help accelerate embedded software development, debug and test. EPKs are virtual platforms (simulation models), including processor models plus peripheral models necessary to boot an operating system (OS) or run bare metal applications. The platform and peripheral models included in the EPKs are open source, so that users can easily add new models to the platform as well as modify the existing peripheral models. The example OS and/or applications are also included.
Imperas M*SDK solutions are complete embedded software development environments, including virtual platforms. They are specifically designed to handle complex multi-core issues. M*SDK contains an OVP model library, iGen for model development, support for heterogeneous, multiprocessor/ multicore processors, a comprehensive verification, analysis, and profiling (VAP) tool set, plus an advanced 3-dimensional (temporal, spatial and abstraction) debug solution, 3Debug™, for heterogeneous multicore processor, peripheral, and embedded software debug. Imperas solutions support hardware-dependent software development such as OS and CPU-aware tracing (instruction, function, task, event), profiling, code coverage and memory analysis. The Imperas SlipStreamer™ patent-pending binary interception technology enables these analytical tools to operate without any modification or instrumentation of the software source code, i.e., the tools are completely non-intrusive.
Currently the following virtual platform EPKs using OVP ARM models are available: Versatile Express Cortex-A9MP Linux, Versatile Express Cortex-A15MP Linux, Integrator CP Cortex-A9UP Linux, Integrator CP Nucleus, Integrator CP eCos, ARMv8-A-FMv1 Cortex-A57MP Linaro Linux, Cortex-M3 uCosII, Cortex-M3 freeRTOS, openRTOS, Altera Cyclone V HPS Cortex-A9MPx2 Linux, Freescale Kinetis Cortex-M4 MQX.
The processor core models and OVP-based virtual platforms are available from the Open Virtual Platforms website, http://www.OVPworld.org/ARM. Models of these ARM cores, as well as other models, work with the Imperas and OVP simulators, including the QuantumLeap™ parallel simulation accelerator, and have shown exceptionally fast performance of hundreds of millions of instructions per second.
Currently available OVP models of the latest ARM cores include: Cortex-A5UP, Cortex-A5MP, Cortex-A7UP, Cortex-A7MP, Cortex-A8, Cortex-A9UP, Cortex-A9MP, Cortex-A15UP, Cortex-A15MP, Cortex-A17UP, Cortex-A17MP, Cortex-A53MP, Cortex-A57MP, AArch32, AArch64, Cortex-M0, Cortex-M0+, Cortex-M1, Cortex-M3, Cortex-M4, Cortex-M4F, Cortex-R4, Cortex-R4F. (See OVPworld.org/ARM for the complete list and more information.)
"ARM cores, with state-of-the-art features such as TrustZone and hardware virtualization, require state-of-the-art software development tools,” said Simon Davidmann, president and CEO of Imperas. "Imperas virtual platform solutions help our users realize positive ROI very quickly, with higher quality software, and accelerated software development schedules.”
The May 2015 OVP release of OVP ARM core models provides only the binaries of the models. Open source of these models is no longer available. The source of the OVP ARM core models can be obtained under license from Imperas. Also, changes have been made to the terms of the licensing of the OVP ARM core models, please see OVPworld.org/about_licensing for more details.
For more information about Imperas, please see www.imperas.com.
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