SAN ANTONIO--(BUSINESS WIRE)--Following the success and strong market acceptance of its first two generations of QorIQ embedded multicore processors, Freescale Semiconductor (NYSE: FSL) today introduced the centerpiece of its third-generation QorIQ portfolio – the new Layerscape system architecture. This core-agnostic, software-aware framework addresses the increasing flexibility and scalability required by network infrastructure OEMs as they adapt to a profusion of connected devices, massive datasets, more stringent security needs, real-time service provisioning and increasingly unpredictable network traffic patterns.
The Layerscape architecture is a fundamental new approach to networking system architectures – one that puts software and programmability at the forefront. It modularizes packet acceleration and forwarding operations from high-level routing decisions; streamlines interaction between the layers; leverages a synchronous run-to-completion model; and supports a consistent programming framework across the architecture using standard C/C++ languages. The extreme programming flexibility and scale of the architecture enable real-time, ‘soft’ control over the network, preserve software investments and help to ensure continued evolution.
“To address the need for more intelligent, dynamic networks, Freescale has taken our QorIQ platform a significant step further with the new software-aware Layerscape architecture,” said Tom Deitrich, senior vice president and general manager of Freescale’s Networking & Multimedia Solutions Group. “Unlike our competitors, we’ve made software awareness an integral part of our new architecture instead of an afterthought. With innovations including core-agnostic compatibility, independent, highly efficient packet processing and real-time visualization capability, we’re accelerating the network’s IQ.”
Leveraging and building upon Freescale’s expansive networking IP portfolio, the Layerscape architecture evolves and extends the QorIQ Data Path Acceleration Architecture (DPAA). Taking a holistic view of the full system architecture, it is designed for optimal programmability, which enables breakthrough packet processing efficiency and associated performance gains. The Layerscape architecture is the foundation of a broad array of forthcoming QorIQ multicore processors, from many-core data path devices delivering up to 100 Gbps of performance to highly integrated, cost- and energy-efficient products operating at less than 3W, leveraging Power Architecture® and ARM® technologies as appropriate.
The modular Layerscape architecture consists of three independent, scalable layers, allowing Freescale to design QorIQ devices with expanded, reduced or removed layers as needed, providing the optimal solution for a given application. The three layers are:
- General-Purpose Processing Layer (GPPL) – Delivers general-purpose compute performance. This layer is optimized for virtualized cloud services and control plane applications
- Accelerated Packet Processing Layer (APPL) – Performs autonomous packet processing and enables customers to program value-added capabilities in a sequential, synchronous, run-to-completion model that abstracts the hardware microarchitecture and gives customers an embedded, C-based programming model
- Express Packet I/O Layer (EPIL) – Facilitates true, deterministic wire-rate performance between network interfaces (up to 100G), supporting switching capabilities for L2 and above
Bringing true programmability and software-awareness to embedded multicore
The Layerscape architecture takes ease-of-use to a new level with a full complement of developer technologies that help customers efficiently deploy, configure, tune and manage systems based on the Layerscape architecture, including:
- Support for open-standard software programming models and key industry initiatives including software-defined networks (SDNs)
- A uniform, consistent architecture and software across all tiers of the portfolio, from entry-level, power-constrained products to high-end, many core devices
- A system profiling and visualization tool that allows for detailed scenario analysis and streamlines development processes
- A platform-independent API for user space application programming called the VortiQa Platform Services Package (PSP), which is designed to simplify application migration. The PSP abstracts hardware complexity, enables application development within the familiar Linux® user space and enables standard C programming
- Broad development support, including third-party tools, RTOSes and full-featured Linux environments from Freescale partners. Internal Freescale support includes the CodeWarrior integrated development environment (IDE), as well as reference design boards, advanced compliers, CodeWarrior debug and configuration tools, models and the QorIQ optimization suite. In addition, Freescale supplies ready-to-use software libraries and vertical-specific VortiQa application-level software solutions
- Unmatched expertise and a history of investing in highly advanced embedded software tools and partnerships to help customers migrate software from legacy Freescale products and/or competitive solutions, with a keen focus on preserving customers’ software investments and streamlining time to market.
Initial products based on the Layerscape architecture
The first two QorIQ product families based on the Layerscape architecture are the LS-1 and LS-2. Highlights of the families include dual ARM Cortex™ processor cores, virtualization support, advanced security, an array of advanced interconnects, a common ISA and software- and pin-compatibility for simple and smooth application migration between the two families. The outstanding performance-per-watt and advanced integration of the LS-1 and LS-2 product families open the QorIQ portfolio to additional markets, including applications with novel form factors and entirely new product categories.
The LS-1 family features two ARM Cortex-A7 cores running at up to 1.2 GHz, with one of the highest levels of integration ever offered in a sub-3W embedded processor. The LS-2 family features two ARM Cortex-A15 cores running at up to 1.5 GHz and under 5W total power. Targeted applications for the LS-1 and LS-2 families include residential gateways, enterprise access points, smart energy systems, industrial communications, line cards and robotics.
Future QorIQ processors based on the Layerscape architecture will leverage Power Architecture technology. Freescale continues to enhance and invest in its industry-leading Power Architecture e6500 core, which will be among the highest-performance cores featured in the new portfolio.
Initial samples of the first products based on the Layerscape architecture are expected in mid-2013.
About the Freescale Technology Forum
Created to drive innovation and collaboration, the Freescale Technology Forum (FTF) has become one of the developer events of the year for the embedded systems industry. The Forum has drawn more than 48,000 attendees at FTF events worldwide since its inception in 2005. Our annual flagship event, FTF Americas, takes place June 18-21, 2012, in San Antonio, Texas.
About Freescale Semiconductor
Freescale Semiconductor (NYSE:FSL) is a global leader in embedded processing solutions, providing industry-leading products that are advancing the automotive, consumer, industrial and networking markets. From microprocessors and microcontrollers to sensors, analog integrated circuits and connectivity – our technologies are the foundation for the innovations that make our world greener, safer, healthier and more connected. Some of our key applications and end-markets include automotive safety, hybrid and all-electric vehicles, next generation wireless infrastructure, smart energy management, portable medical devices, consumer appliances and smart mobile devices. The company is based in Austin, Texas, and has design, research and development, manufacturing and sales operations around the world. www.freescale.com
Freescale, the Freescale logo, QorIQ and CodeWarrior are trademarks of Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Layerscape is a trademark of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org. ARM is the registered trademark of ARM Limited. Cortex is the trademark of ARM Limited. © 2012 Freescale Semiconductor, Inc.