SANTA CLARA, Calif.--(BUSINESS WIRE)--Astera Labs, a pioneer in purpose-built connectivity solutions for intelligent systems, today announced several new leadership appointments to support accelerated company growth and drive product development in strategic markets. The new senior leaders include Sanjay Charagulla as vice president and general manager of the Memory Connectivity Business Unit, Richard Ward as vice president and general manager of the Data Connectivity Business Unit, and Philip Mazzara as vice president of Legal Affairs.
“This is an exciting moment of growth for Astera Labs, and we are thrilled to welcome Sanjay, Richard, and Philip as we continue to mature as a company,” said Sanjay Gajendra, chief business officer for Astera Labs. “With decades of shared experience between these proven industry veterans, I’m confident that they will make an immediate impact throughout the company, support wide-spread expansion of existing product families, and guide development of new purpose-built connectivity solutions in strategic markets.”
Sanjay Charagulla joins as vice president and general manager of the Memory Connectivity Group to ramp up operations for the Leo CXL™ Memory Accelerator Platform and spearhead development of new memory connectivity solutions. He brings more than 25 years of experience in the semiconductor industry and most recently led formation of the Compute Express Link™ (CXL) business unit at Rambus.
“Astera Labs is a key industry leader supporting the adoption and seamless deployment of new memory connectivity technologies like CXL and I’m thrilled to join them at this critical juncture of expansion,” said Charagulla. “I look forward to bolstering our position in this rapidly growing market and driving meaningful innovation in new memory connectivity designs.”
Richard Ward joins as vice president and general manager of the Data Connectivity Group to grow the Aries PCI Express® (PCIe®)/CXL Smart Retimer and Taurus Ethernet Smart Cable Module™ portfolios and to develop future intelligent data center interconnect solutions. He has over 30 years of semiconductor and systems development experience and previously worked on Switches, CPUs, and many optical modules and interconnect strategies at companies like Intel, Inphi, and Texas Instruments.
“High-speed and Intelligent data connectivity is key to unlocking the true potential of accelerated-computing infrastructure,” said Ward. “I’m excited to explore and drive the expansion of the Astera Labs’ smart data connectivity solutions into optical IO, UCIe, and other exciting technologies to solve performance bottlenecks throughout the data center.”
Phil Mazzara joins as vice president of Legal Affairs to oversee the company’s global legal and compliance functions. Mazzara was previously General Counsel and Corporate Secretary at Innovium, Inc, where he was responsible for corporate governance, commercial transactions, intellectual property, and compliance programs and guided Innovium through its acquisition by Marvell Technology, Inc.
“Astera Labs’ ability to establish itself as an industry leader in just over four years since its founding is remarkable and underscores the company’s culture of innovation and how it’s become a trusted partner to customers and the industry at large,” said Mazzara. “I’m proud to join this team of innovators and support the next phase of the company’s growth.”
About Astera Labs
Astera Labs Inc., a fabless semiconductor company headquartered in the heart of California’s Silicon Valley, is a leader in purpose-built connectivity solutions for data-centric systems throughout the data center. The company’s product portfolio includes system-aware semiconductor integrated circuits, boards, and services to enable robust CXL, PCIe, and Ethernet connectivity. For more information about Astera Labs including open positions, visit www.AsteraLabs.com.
Taurus Smart Cable Module™ and Taurus SCM™ are trademarks of Astera Labs Inc.
Compute Express Link™ and CXL™ are trademarks of the CXL™ Consortium.
PCI Express® and PCIe® are trademarks or registered trademarks of PCI-SIG.