SAN FRANCISCO--(BUSINESS WIRE)--The Design Automation Conference (DAC) is now accepting submissions for the 57th DAC Designer and IP Track. This is an opportunity for engineers and developers around the world to help shape the future by sharing their technical insights at the premier event devoted to the design and design automation of electronic chips to systems.
The Designer and IP Tracks bring together designers, users and experts from across the globe to present their design experiences on effective design flows, methods, and tool usage. Each track offers a unique opportunity to network with and learn from other industry experts.
The 57th DAC will be held at Moscone West Center in San Francisco, CA from July 19-23, 2020. DAC will co-locate with SemiCon West 2020, which is being held at the Moscone Center, North and South Halls, July 21-23, 2020.
“The focus of the Designer Track is on the flows and methodologies deployed for ASIC design, verification, implementation and software integration by the user,” said Designer and IP Track Chair, Renu Mehra of Synopsys. “This track covers core EDA front-end and back-end topics and also focuses on verticals including autonomous systems, machine learning, security and cloud. The Designer Track is the only one of its kind, developed exclusively by DAC to provide EDA tool users, hardware designers, software engineers, and application engineers the opportunity to share knowledge and experiences with each other.”
“The IP Track at DAC has grown significantly over the past five years since inception,” said IP Track Co-Chair, Randy Fish of UltraSoC. “The key to the growth is it not only brings together the entire IP, electronic design ecosystem under one roof for three days but the track is targeted specifically at practitioners. So, whether you are an IC designer, IP core designer, IP ecosystem provider, embedded software developer, automotive electronics engineer, security expert or engineering manager, the IP Track is the place to meet and share your experiences.”
The submission process for both tracks is easy: Submit a 100-word description of your presentation with six slides. Submissions may describe the application of tools to the design of a novel electronic system or the integration of EDA tools within a design flow or methodology to produce such systems. The Designer Track and IP Track differ from vendor-specific user forums in that they are not tied to a specific EDA vendor.
Designer Track Submissions: https://www.dac.com/submission-categories/designer-track
The DAC Designer Track committee is looking for submissions that tackle relevant topics and provide high-quality content which target challenges, innovations and trends in chip design. Categories include:
- Front-end silicon design
- Back-end silicon design
- Machine learning
- Cloud applications
IP Track Submissions: https://www.dac.com/submission-categories/ip-track
IP Track submissions may describe the overall design and/or application of tools for creating the hardware, IP and/or software components of a novel electronic system. The IP Track committee is specifically seeking contributions from:
- System engineers
- Hardware designers
- Embedded software developers
- Application engineers
- Vendor/customer teams
Documented tool use may target electronic design and system design at all levels of abstraction and across all application domains.
Presentation and Poster Format
Based on Program Committee evaluation, Designer Track and IP Track submissions may be accepted in either presentation and poster form or poster-only form. A Best Presentation award, based on both the quality of the submission and the DAC presentation itself, will be selected from each of the Front-end and Back-end Designer Tracks and IP Track presentations.
Accepted Designer Track and IP Track presentations and posters are not included in the DAC proceedings. However, accepted Designer Track and IP Track submissions (both posters and presentation slides) will be made available on the DAC website after the conference as a part of the DAC Archives.
The deadline for all Designer and IP Track submissions is January 22, 2020. For additional submission information and deadlines, please visit www.dac.com under Call for Contributions or https://www.dac.com/submission-categories/designer-track#questions.
The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community representing more than 1,000 organizations attends each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area with approximately 175 of the leading and emerging EDA, silicon, intellectual property (IP) and design services providers. The conference is sponsored by the Association for Computing Machinery’s Special Interest Group on Design Automation (ACM SIGDA) and the Institute of Electrical and Electronics Engineer’s Council on Electronic Design Automation (IEEE CEDA).
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