LOUISVILLE, Colo.--(BUSINESS WIRE)--A device that makes 3D printing safer, an audio-enabled IoT security system and an edge node that collects power from multiple sources won top prizes in the first International Hardware Design Contest at the 54th Design Automation Conference (DAC).
The contest, sponsored by Lattice Semiconductor, honored five design teams as finalists from more than 30 engineering teams that registered to compete in the contest. The five finalist teams highlighted their submissions at the World of IoT booth at DAC, the premier event devoted to the design and automation of electronic systems (held in Austin, Texas June 19 – 22, 2017). The top three teams who received cash prizes are:
iSmart Team: Low Power, Low Cost Audio Based Security IoT System
University of Illinois at Urbana-Champaign / Inspirit IoT, Inc.
Di He, Dushyant Bhan, Zizhen Liu, Xinheng Liu, Deming Chen, Zuofu Cheng, Swathi Gurumani, Kyle Rupnow
IoMT Pilot: Towards FPGA-based Collision Detection Accelerator for 3D
University at Buffalo
Sree Harini Dunnala, Jerry Ajay, Aravind Polkam, Yuyang Chen, Aosen Wang, Chi Zhou, Wenyao Xu
SOC: Multiple Energy Source Powered IoT Node Design
Shandong University / Shandong Yolox Intelligent Electronic Co Ltd / Oklahoma State University / City University of Hong Kong
Ke Liu, Jing Li, Weining Song, Defu Cao, Jingtao Zhang, Changqi Feng, Chun Wang, Wen Bi, Yu Liang, Lei Ju, Jingtong Hu, Mengying Zhao, Chun Jason Xue
The winners were announced during the conferences keynote session at the 54th gathering of DAC.
The International Hardware Design Contest was developed and sponsored by ACM Special Interest Group in Design Automation (SIGDA), DAC and corporate sponsor Lattice Semiconductor. This competition will be an annual hardware design contest with themes to boost research and development in areas related to the design and automation of electronic systems. For this first year, the theme was FPGAs for Internet-of-Things (IoT), and the contest explored the use of low-power FPGAs to implement new concepts and designs in IoT edge computing.
“There was tremendous response for this year’s International Hardware Design Contest, receiving more than 30 entries from nine different countries around the globe, and we couldn’t be more pleased with its success,” said Claude Moughanni, senior director, strategy at Lattice Semiconductor. “The caliber of solutions developed and presented were diverse and highly creative. Submissions solved real-world problems in a dynamic IoT market, solving design challenges with Lattice’s edge-optimized low power, small form factor FPGAs. We appreciated all the great submissions, and we look forward to more design contests to come.”
The Design Automation Conference (DAC) is recognized as the premier event for the design of electronic circuits and systems, and for electronic design automation (EDA) and silicon solutions. A diverse worldwide community representing more than 1,000 organizations attends each year, represented by system designers and architects, logic and circuit designers, validation engineers, CAD managers, senior managers and executives to researchers and academicians from leading universities. Close to 60 technical sessions selected by a committee of electronic design experts offer information on recent developments and trends, management practices and new products, methodologies and technologies. A highlight of DAC is its exhibition and suite area with approximately 200 of the leading and emerging EDA, silicon, intellectual property (IP) and design services providers. The conference is sponsored by the Association for Computing Machinery (ACM), the Electronic Systems Design Alliance (ESDA), and the Institute of Electrical and Electronics Engineers (IEEE), and is supported by ACM's Special Interest Group on Design Automation (ACM SIGDA).
Design Automation Conference acknowledges trademarks or registered trademarks of other organizations for their respective products and services.