DUBLIN--(BUSINESS WIRE)--Research and Markets (http://www.researchandmarkets.com/research/x2rkg7/apple_iphone_6) has announced the addition of the "Apple iPhone 6 Plus Rear-Facing Camera Module - Reverse Costing Analysis" report to their offering.
With the iPhone 6 & 6 Plus iSight camera modules, Apple improves the logic ISP circuit, passing from 65nm to 45nm technology node process, and introduces the Optical Image Stabilization system.
The iPhone 6 Plus camera module integrates the 8Mpixel resolution CMOS Image Sensor, with aperture of f/2.2 and a pixel size of 1.5µm, in a new bigger and flexible packaging concept.
The CIS is assembled in flip-chip on a ceramic substrate with a gold stud bumping process and uses the unique technology from Sony (Exmor-RS). The technology consists in a stacking of two separate chips using optimized processes: a pixel array circuit which uses a Back-Side Illuminated (BSI) technology, and a logic ISP circuit. This allows to raise the pixel array size by 15% and thus to considerably improve the light sensitivity.
The two camera modules, slightly different in dimensions, are both equipped with a 5-elements lens module and a VCM auto-focus actuator.
Key Topics Covered:
1. Overview / Introduction
2. Camera Module Supply Chain & Companies Profile
- iPhone 6 Plus Camera Module Supply Chain
- Companies Profile (Sony, LG Innotek)
3. iPhone 6 Plus Teardown
4. Physical Analysis
- Synthesis of the Physical Analysis
- Physical Analysis Methodology
- Camera Module
- Camera Module View & Dimensions
- Camera Module X-Ray
- Camera Module Disassembly
- Auto-Focus Driver
- Hall Element
- Camera Module Cross-Section
- Overview- Housing
- Ceramic Substrate & IR Filter
- Lenses, VCM & FPC
- CMOS Image Sensor 63
- View & Dimensions
- Pads, TSV Connections & Tungsten Grid
- CIS Pixels
- Logic Circuit (Main blocks, Transistors, SRAM)
- CMOS Image Sensor Cross-Section
- Overview
- Pixel Array Circuit
- Logic Circuit
- Pad Trenches & TSVs
- Comparison with iPhone 5S and Nokia Lumia
5. CIS Manufacturing Process Flow
- Global Overview
- Logic Circuit Front-End Process
- Pixel Array Circuit Front-End Process
- BSI + TSV + Microlenses Process
- CIS Wafer Fabrication Unit
6. Cost Analysis
- Synthesis of the cost analysis
- Main steps of economic analysis
- Yields Hypotheses
- CMOS Image Sensor Cost
- Logic Circuit Front-End Cost
- Pixel Array Front-end Cost
- BSI & TSV Front-End Cost
- Color Filters & Microlenses Front-End Cost
- Total Front-End Cost
- Back-End: Tests & Dicing
- CIS Wafer and Die Cost
- Camera Module Assembly Cost
- Lens Module Cost
- AFA/OIS Cost
- Final Assembly Cost
- Camera Module Cost
For more information visit http://www.researchandmarkets.com/research/x2rkg7/apple_iphone_6
