DUBLIN--(BUSINESS WIRE)--Research and Markets has announced the addition of the "Qualcomm WCD9335: Technology and Cost Comparison" report to their offering.
Qualcomm, a world leader in mobile technologies, offers the new Snapdragon 820, a complete chipset currently powering or in-development with more than 100 smartphones worldwide.
The U.S. versions of Samsung's latest flagship phones, the Galaxy S7 and Galaxy S7 Edge, integrate the Snapdragon 820 chipset. In this chipset, we discovered for the first time a Qualcomm component featuring Fan-Out Wafer-Level Packaging (FOWLP): the Qualcomm Audio Codec WCD9335.
Located on the smartphone's main board, the audio codec chip's presence in the Samsung Galaxy S7 and S7 Edge depends on the smartphone version. The international version, featuring an Exynos chipset, integrates the audio codec chip from Cirrus Logic. The U.S. version, featuring the Snapdragon 820 chipset, integrates the audio codec from Qualcomm.
The Qualcomm WDC9335 is wafer-level packaged with fan-out technology. This is still relatively rare in the smartphone market but is expected to spread quickly. The FOWLP technology used is the eWLB, licensed by Intel/Infineon to several OSATs including ASE Group, Nanium, and STATS ChipPAC.
Thanks to this FOWLP process, Qualcomm is able to propose a very small die independent of the area required by the I/O pads. The result is a very cost-effective component that can compete with a standard fan-in WLP technology.
This report includes a comparison with the audio codec solution from Cirrus Logic for the international version, which uses a standard fan-in WLP technology. It also features comparisons with FOWLP technologies like RCP from NXP/nepes, and eWLB 1st-generation from Infineon.
Key Topics Covered:
Company Profile & Supply Chain
Physical Analysis Methodology
- Samsung Galaxy S7 Teardown
-- Component removal
- Fan-Out Packaging Analysis
-- Package view, dimensions & marking
-- Fan-out package cross-section
-- Fan-out package process
- Die Analysis
-- Die view, dimensions & marking
-- Die cross-section
-- Die process
Manufacturing Process Flow
- Chip Fabrication Unit
- eWLB Fabrication Unit
- eWLB Process Flow
- Synthesis of the Cost Analysis
- Die Cost Analysis
-- Wafer front-end cost
-- Probe test cost
-- Die cost
- eWLB Cost Analysis
-- eWLB wafer cost
-- eWLB cost per process step
- Component Cost
Cost Analysis Simulation Without eWLB Packaging
- Die cost
- WLP package cost
- Component cost comparison
Estimated Price Analysis
- Manufacturer Financial Ratios
- Estimated Sales Price
Technology and Cost Comparison with Infineon's eWLB and NXP's RCP
For more information visit http://www.researchandmarkets.com/research/9dznkd/qualcomm_wcd9335