HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., announces the latest release of its mixed-language simulator and advanced verification platform, Riviera-PRO™ 2015.06. With the introduction of Condition and Path Coverage, Riviera-PRO now provides a complete coverage analysis package, improving productivity for FPGA and ASIC designers.
Functional coverage and code coverage are two powerful debugging methods that reduce verification time by exposing the areas of a design that require additional testing. This process improves productivity by measuring how much code has been exercised and which parts of any given design have not tested well. In addition, the coverage analysis tools within Riviera-PRO are completely automated, requiring no user intervention or change in the design or testbench.
“The addition of Condition Coverage and Path Coverage features to Riviera-PRO now allows for complete coverage analysis,” said Satyam Jani, Riviera-PRO Product Manager. “Conditional statements such as if-else and case create various paths in the design that divert the stimulus flow in a specific path. Path Coverage enhances the analysis of statement/branch coverage by providing information on completeness of program execution paths. Similarly, Condition Coverage enhances expression coverage data by monitoring and factorizing logical expression used in conditional statements.”
The 2015.06 release of Riviera-PRO also includes numerous new features, enhancements, and performance optimizations. For additional information, tutorials, free evaluation download and What’s New Presentation, please visit www.aldec.com/products/riviera-pro.
Aldec Inc., headquartered in Henderson, Nevada, is an industry leader in Electronic Design Verification and offers a patented technology suite including: RTL Design, RTL Simulators, Hardware-Assisted Verification, SoC and ASIC Prototyping, Design Rule Checking, CDC Verification, IP Cores, Requirements Lifecycle Management, DO-254 Functional Verification and Military/Aerospace solutions. www.aldec.com
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