AUSTIN, Texas--(BUSINESS WIRE)--Today the Silicon Integration Initiative (Si2) announced the contribution of key methodologies currently published in the CPF 2.0 Standard to the IEEE-1801 working group. This compilation of constructs is referred to as the Open Low-Power Methodology (OpenLPM), and is designed to greatly increase the degree of interoperability between the leading power intent format standards, the Common Power Format (CPF) from Si2 and the IEEE-1801 format. The technical contribution is from Si2’s Low Power Coalition.
Background: Both Si2’s CPF and IEEE 1801-2009 are well established open power intent format standards. Today, even though there are many similarities between 1801 and CPF, there are differences in the low power methodologies embedded in the two standard formats which make interoperability challenging. These conflicting methodologies for low power design are an industry-wide problem, impacting productivity and profitability. Methodology convergence is the key to enable mixed-vendor flows and is a pre-requisite for any future power format convergence. With the recent Si2 releases of the Interoperability Guide and advanced CPF 2.0 specification (both available at www.si2.org), CPF became more compatible with 1801-2009. However, to further close the methodology gap, there is a need to extend 1801 with production proven methodologies from CPF, hence the motivation behind the Si2 LPC contribution.
As an open power format standard, CPF has gained worldwide adoption with many hundreds of production proven tape outs over the past few years. Proven techniques, such as disjoint power domains and a formal hierarchical approach, are well adopted by industry. “At Qualcomm, we have been using CPF and found that formal hierarchical design flow support, with both bottom-up and top-down capability, are critical to enable complex advanced low power designs,” says Dr. Karim Arabi, Senior Director, Engineering, at Qualcomm. “We appreciate Si2 for facilitating a converged power intent methodology by contributing these key aspects of CPF to 1801. It will enable an equivalent and consistent methodology in the 1801 format.”
“As an active member of both IEEE and Si2, LSI has knowledge of both standards and must use them together to support both internal and customer design flows,” says J.C. Parker, Senior Director, Design Tools and Methodologies, LSI. “We’re delighted to see Si2 and IEEE working toward defining a single methodology, such as power domain and supply set centric power intent specification that supports our needs.”
“Multiple low-power design methodologies impose extra costs throughout the electronics design chain, exacerbating the already complex challenge of meeting increasingly demanding power specifications for electronic devices,” says Dr. Sumit DasGupta, Senior Vice-President of Engineering, Si2. “The contributed methodology of successive refinement, which retains a golden specification for IP integration and reuse are obviously important to IP suppliers. Enabling this consistent methodology across both standards will reduce costs to support customers, and reduce their costs to develop extremely complex low-power designs.”
Additional industry support for this effort from IBM, STMicroelectronics, and Texas Instruments is referenced in the quote sheet at this link: http://www.si2.org/?page=1347
CPF 2.0 is available for download at: http://www.si2.org/?page=811
About the Low Power Coalition (LPC)
The Low-Power Coalition (LPC) is delivering enhanced capabilities in low-power Integrated Circuit (IC) design flows in particular relating to specifications of low-power design intent, architectural tradeoffs, logical/physical implementation, design verification and testability. Member companies are: Apache Design Solutions, ARM (Nasdaq: ARMHY), Atrenta, Cadence Design Systems (Nasdaq: CDNS), Calypto Design Systems, Entasys, IBM (NYSE: IBM), LSI (NYSE: LSI), and Magma Design Automation (Nasdaq:LAVA). For further information on the Low Power Coalition, see http://www.si2.org/?page=1235.
Si2 is the largest organization of industry-leading semiconductor, systems, EDA and manufacturing companies focused on the development and adoption of standards to improve the way integrated circuits are designed and manufactured, in order to speed time to market, reduce costs, and meet the challenges of sub-micron design. Now in its 23rd year, Si2 is uniquely positioned to enable timely collaboration through dedicated staff and a strong implementation focus driven by its member companies. Si2 represents nearly 100 companies involved in all parts of the silicon supply chain throughout the world. See http://www.si2.org
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