Tested by the EEMBC Certification Labs (ECL) in a 285-MHz simulation environment, the MeP received an out-of-the-box score of 0.08793 ConsumerMarks(TM) per MHz (or 25.1 at 285 MHz). EEMBC's Consumer benchmark suite tests the performance of processors and compilers in digital imaging applications, including high-pass grayscale filter, JPEG codec, and RGB conversion kernels.
"It is gratifying to see Toshiba, a founding EEMBC member, among the industry leaders that are making validated performance information about their processors available to the public," said Markus Levy, EEMBC president. "The EEMBC scores for the MeP core demonstrate the excellent efficiency of the architecture even without hand-tuned optimizations, but equally as important is that Toshiba is making a major contribution to advancing EEMBC(R) benchmarking in the SOC IP realm."
Toshiba's configurable MeP media processor combines a 32-bit RISC core containing a five-stage pipeline that supports 16- and 32-bit-length instructions and user custom instruction extensions including a VLIW coprocessor to perform data-centric applications such as multimedia, image processing, communications and audio processing. The MeP core can be customized for a specific task and embedded into a media processing SoC.
"EEMBC benchmark scores for the MeP-c2 core illustrate the strength of Toshiba's MeP for digital media applications," said Dr. Tohru Furuyama, general manager of SoC Research & Development Center, Toshiba Corp. "In addition to the optimized Red Hat GNUpro(TM) C-compiler, the MeP's pre-defined optional 'multiply-accumulate' instructions provide improved performance and code density that greatly benefit the developers of digital media SoCs."
A detailed EEMBC benchmark score report on the Toshiba MeP is available now from the EEMBC Web site at www.eembc.org or direct from the following URL:
EEMBC, the Embedded Microprocessor Benchmark Consortium, develops and certifies real-world benchmarks and benchmark scores to help designers select the right embedded processors for their systems. Every processor submitted for EEMBC(R) benchmarking is tested for parameters representing different workloads and capabilities in communications, networking, consumer, office automation, automotive/industrial, embedded Java, and microcontroller-related applications. With members including leading semiconductor, intellectual property, and compiler companies, EEMBC establishes benchmark standards and provides certified benchmarking results through the EEMBC Certification Labs (ECL) in Texas and California.
EEMBC members include 3DSP, Altera, AMD, Analog Devices, ARC International, ARM, Digital Communication Technologies, esmertec, Fujitsu Microelectronics, Green Hills Software, IAR, IBM Corp., Imagination Technologies, Improv Systems, Infineon Technologies, Intel, Intrinsity, LSI Logic, Matsushita Electric Industrial, Mentor Graphics, Metaware, Metrowerks, MIPS Technologies Inc., Motorola, National Semiconductor, NEC Electronics America, Oki Semiconductor, ParthusCeva, Philips Semiconductors, PMC-Sierra, Precise, Red Hat, Renesas Technology, Samsung, Sandbridge Technologies, Sony Computer Entertainment, STMicroelectronics, StarCore, Sun Microsystems, SuperH, Symbian, Tao Group, Tensilica, Texas Instruments, Toshiba, VIA Technologies, and Wind River Systems.
EEMBC is a registered trademark and ConsumerMark is a trademark of the Embedded Microprocessor Benchmark Consortium. All other trademarks appearing herein are the property of their respective owners.