Manufacturable, Leading-Edge Solutions for Logic and Memory Devices
Are Revealed in SEMATECH Papers at IEDM 2006
SAN FRANCISCO--(BUSINESS WIRE)--Reflecting an aggressive program to develop manufacturing solutions for next-generation logic and memory technologies, SEMATECH engineers will present seven technical papers on CMOS transistor scaling at the prestigious International Electronic Devices Meeting (IEDM) that begins here today.
“A Novel In Situ Plasma Treatment For Damage-Free Metal/High-K Gate Stack RIE Process.”
“Papers submitted to IEDM are subjected to a very rigorous process of peer review, and require a high standard of technical innovation,” said Raj Jammy, director of SEMATECH Front End Processes (FEP) Division. “Our success in placing seven papers at this important conference is a singular achievement for our organization, and a reflection of our commitment to our members and the microchip industry.”
Written by more than 40 SEMATECH-affiliated authors, the papers document work in high-k materials, metal gates, performance enhancements in p- and n-channel devices, lifetime/threshold voltage (Vt) stability analysis methodology, finFETs, and memory dielectrics. They include:
An article by lead authors Siddarth Krishnan, Rusty Harris and Paul Kirsch investigates the merits of HfO2 and HfSiO for pFETs with metal gates on Si(110) substrates. This work resulted in 3.3X higher drive currents than pFETS on Si(100) substrates. “These are some of the best drive currents reported to date in pFETs,” said Byoung Hun Lee, manager of FEP’s Advanced Gate Stack Program.
Other papers include:
(The findings from the above two papers reinforce the work of SEMATECH engineers who identified thermally stable high-performance nMOS high-k/metal gate stacks with Hf-based dielectrics earlier this year.)
For more than 50 years, IEDM has been the world’s main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices. Topics at this year’s conference include deep submicron CMOS transistors and memories, novel displays and imagers, compound semiconductor materials, nanotechnology devices and architectures, micromachined devices, and smart-power technologies.
SEMATECH is the world’s catalyst for accelerating the commercialization of technology innovations into manufacturing solutions. By setting global direction, creating opportunities for flexible collaboration, and conducting strategic R&D, SEMATECH delivers significant leverage to our semiconductor and emerging technology partners. In short, we are accelerating the next technology revolution. For more information, please visit our website at www.sematech.org. SEMATECH, the SEMATECH logo, AMRC, Advanced Materials Research Center, ATDF, the ATDF logo, Advanced Technology Development Facility, ISMI and International SEMATECH Manufacturing Initiative are servicemarks of SEMATECH, Inc.