NanoDynamics Appoints Dr. Jeffrey Jordan VP, NanoCluster Devices Subsidiary; NanoDynamics' Self-Assembling Nanowire Process Enables Faster, Smaller Chips for Semiconductor and Electronics Markets
NanoDynamics will be showcasing the NCD technology at SEMICON West, held July 10-14 at San Francisco's Moscone Center. For more information, visit NanoDynamics at booth number 9651.
“Despite comprising a key component of what SEMI forecasts will be a $4.2 billion nanoelectronics market by 2010, the semiconductor industry is expected to be relatively conservative in adopting those new technologies based on existing infrastructure costs and long timelines inherent in many of the newer techniques”
As the semiconductor industry continues to pursue the challenges of Moore's Law and demand accelerates for higher performance chips, the incumbent "top-down" fabrication approach based on lithography and etching is nearing its limits in terms of miniaturization. A widely explored alternative, the "bottom-up" approach to circuit assembly, involves the fabrication of wires, transistors and interconnects from nanoscale building blocks. Although capable of meeting size objectives, this approach is hampered by the difficulty, expense and long time periods involved in developing and manipulating those building blocks at the molecular level. The NCD technology achieves the resolution of the bottom-up approach by leveraging self-assembling nanowires, providing a simpler, less prohibitive path to incorporating the superior performance capabilities of nanoscale engineering into conventional semiconductor manufacturing processes.
"Despite comprising a key component of what SEMI forecasts will be a $4.2 billion nanoelectronics market by 2010, the semiconductor industry is expected to be relatively conservative in adopting those new technologies based on existing infrastructure costs and long timelines inherent in many of the newer techniques," said Keith Blakely, CEO of NanoDynamics. "Building on tried and true lithographic methods, our NCD technology provides semiconductor fabricators a path to the benefits of nanoscale circuitry without those usual barriers to entry."
Based on a novel combination of the well-established lithography and cluster deposition techniques, the highly flexible NCD method fabricates nanowires for a variety of functional circuit features including silicon transistors, copper interconnects and palladium-based hydrogen sensors. Nanoscale particle clusters are first deposited onto contacts and templates that are prefabricated using conventional lithographic methods. Manufacturers then employ one of several proprietary methods for managing particle deposition and wire formation that include template and percolation-based approaches, each suited for distinct applications and both capable of producing conductive nanowires that are automatically connected to the circuit's electrical contacts. The resulting nanowires are smaller and faster than conventional circuits including CMOS devices. Furthermore, the high purity of the nanoscale copper particles demonstrates further promise for lower resistance interconnects and higher current flows.
NanoCluster Devices is currently investigating the technology's capabilities for producing copper interconnects. At each technology node in a circuit, the pitch of the interconnects is reduced and the depth to width or "aspect" ratio is increased. Those minute junctions require processes with highly-precise trench filling capabilities, a need often addressed by depositing copper ions or molecules via Electrochemical Deposition (ECD) followed by subsequent Chemical Mechanical Planarization (CMP) processing to remove the unwanted copper deposits. Through the highly selective application of nanoscale copper clusters, the NCD technique potentially reduces the need for subsequent CMP processing. NanoCluster Devices has demonstrated selective filling of sub-200 nanometer trenches with a 5:1 aspect ratio. Hydrogen annealing of the structures then produces dense, high-quality copper interconnects.
"The NCD techniques have demonstrated functional interconnects and transistor structures on the scale of 50 nanometers, a wire width that is just 1 percent of the smallest lithographic dimension. The process marks significant advantages for the semiconductor industry as well as magnetic, chemical and light sensor manufacturers," said Dr. Jordan. "As we enter the commercialization and strategic partnership phase of development, we look forward to delivering a practical route to meet the next-generation circuitry needs of electronics makers."
Dr. Jordan joined NanoDynamics from Praxair, Inc. where he served as manager of Electronics Materials for the company's Electronics and Analytical R&D Division. In that capacity, Jordan led the development and commercialization of atomic layer (ALD) and chemical vapor deposition (CVD) precursors for use in semiconductor applications. Prior to Praxair, Jordan served for more than five years at the NASA Langley Research Center directing nanomaterials and chemical research and development for a variety of applications including sensors, catalytic systems, and aerospace technologies. He has authored more than 30 peer reviewed papers and 17 patents and invention disclosures. Dr. Jordan received his B.Sc. in Chemistry and his Ph.D. in Analytical Chemistry from the State University of New York at Buffalo.
NanoDynamics is a diversified technology and manufacturing company utilizing nanoscale engineering to address some of the world's biggest challenges. With nano-enabled solutions in the fields of energy, water processing, life sciences, electronics, advanced materials and consumer products, NanoDynamics is committed to delivering the power of nanotechnology to the global marketplace. For more information, visit the company's website at www.nanodynamics.com.