Teradyne Introduces Tiger Source Synchronous Pin Electronics; New Technology Delivers 3.2 Gbps Functional Test in Production

BOSTON--(BUSINESS WIRE)--July 14, 2003--Teradyne, Inc. (NYSE:TER) introduced today the industry's first same cycle Source Synchronous Pin Electronics (SSPE(TM)), the latest option for the highly successful Tiger SOC test platform. The new SSPE on Tiger delivers comprehensive functional at-speed test in production. SSPE maximizes quality, yield, and overall economics for manufacturers and designers requiring high fault coverage. With SSPE's innovative approach, data is latched with its "same-cycle" associated device clock, reducing jitter and widening the measured data eye to increase yield.

Multiple high-speed bus architectures are emerging to service the increasing demand for data bandwidth. Source synchronous parallel differential buses, such as HyperTransport(TM) and Rapid IO,(TM) are rapidly being integrated onto chipsets, microprocessors and network processors. Higher speed parallel I/O interconnects, such as DDR memory buses and the Intel(R) Pentium(R) 4 front side bus, are exceeding Gbps data rates. Tiger SSPE delivers the most accurate functional test solution for these unidirectional differential and single-ended I/O source-synchronous buses.

“Tiger with SSPE and Real I/O(TM) pattern generation provides single-ended or differential signals covering all device waveform and time domain combinations, while tracking same cycle source synchronous device output clocks at data rates up to 3.2Gbps.”

"Alternative test approaches use dedicated differential channel cards, limited time domain/waveform combinations, and restricted clock tracking", said Glenn Farris, Computing Marketing Manager. "Tiger with SSPE and Real I/O(TM) pattern generation provides single-ended or differential signals covering all device waveform and time domain combinations, while tracking same cycle source synchronous device output clocks at data rates up to 3.2Gbps." In benchmark evaluations, Tiger consistently enables test time advantages of 20-30% versus ATE systems without this timing flexibility, while the SSPE has achieved wider data eyes, improving test quality and enabling higher yield and lower cost.

About Tiger

Catalyst Tiger is the first over 1 Gbps SOC test system. Extending the Catalyst Family, Tiger offers the flexibility and scalability required by leading fabless subcontractors and integrated device manufacturers by providing economical at-speed testing for a variety of leading-edge devices. Tiger offers up to 1264 digital pins, with a full complement of SSPE boards, while combining unequaled analog test capability, timing flexibility, and programmable speed all in one versatile platform. Tiger's new 3.2Gbps SSPE, 3.2 Gbps SerDes Port Qualifier and 9 GHz GigaDig instruments extend the Tiger platform and position it as the premier platform for testing high-speed communications devices.

About Teradyne

Teradyne (NYSE:TER) is the world's largest supplier of Automatic Test Equipment, and a leading supplier of interconnection systems. The company's products deliver competitive advantage to the world's leading semiconductor, electronics, automotive and network systems companies. In 2002, Teradyne had sales of $1.22 billion, and currently employs about 6800 people worldwide. For more information, visit www.teradyne.com.

HyperTransport is a trademark of the HyperTransport Technology Consortium.

RapidIO is a trademark of the RapidIO Trade Association.

Intel and Pentium are registered trademarks of Intel Corporation or its subsidiaries in the United States and other countries.

SSPE and Real I/O are trademarks of Teradyne.