Teradyne's multi-platform approach covers the largest range of ICs, including those in production today and those being designed for tomorrow. Teradyne gives subcontractors unique advantages, including superior throughput and outstanding test economics. Teradyne offers fabless and subcontracting firms a choice of the following platforms: Teradyne's J973 Series for the testing of high performance ICs; ARIES for testing high-speed memory devices; Catalyst for highly integrated, mixed-signal ICs, including systems-on-a-chip; Flash 750 for testing of flash memory devices; and INTEGRA J750 for microcontrollers and low-end digital and mixed-signal ICs. "Teradyne's broad offering of cutting-edge ATE," said George Chamillard, CEO of Teradyne, "is proving to be the winning choice among fabless and subcontracting companies, with more than 600 systems installed in this market worldwide."
About INTEGRA J750
The INTEGRA J750 delivers up to 1,024 digital channels into a zero footprint system entirely contained within a test head. Its high-throughput parallel testing capabilities help deliver 95% parallel test efficiency for up to 32 devices. The system also features IG-XL test software, the semiconductor ATE industry's first test development suite combining the power and performance of the latest PC technology and Windows NT operating system with the familiarity of standard Windows productivity tools, like Microsoft Excel and Visual Basic. Its small footprint and high parallel test throughput provides the most economical approach to testing complex VLSI devices with embedded memory and analog cells.
About Catalyst
Catalyst dominates the SOC market with test capabilities for DSL, wireless, microwave, and power management applications. Catalyst currently offers wireless device, quad-site testing, providing the best test economics and most complete array of analog instrumentation. When a cell call is placed, or a PC, printer, scanner, pager, or a DVD is utilized, Catalyst tested ICs make it happen.
New Catalyst Tiger
Catalyst Tiger is the market's first over 1 Gbps SOC test system. Extending the Catalyst Family, Tiger shares the same high throughput zero-time DSP architecture, IMAGE(TM)software, and state-of-the-art analog instrumentation and extends the Catalyst family to 1024 digital pins. Powered by breakthrough Silicon Germanium (SiGe) technology, Tiger sets a new digital performance standard with full I/O data rates to 1.6 Gbps while retaining the timing flexibility at top speed demanded by chipset and network processing applications.
New J973EP
Introduced at SEMICON West this July, the J973EP is the only VLSI System for structural to full-performance testing. The J973EP enables microprocessor, core logic, and DSP manufacturers to swiftly shift, in real-time, between full-functional and structural test or balance both types of test. This new VLSI test system provides the full range of test capability, from low cost DFT testing to full performance functional testing without having to change hardware or install upgrades in the system. Real Time Enabling(TM)provides manufacturers with the capability to dial-up a test configuration and the J973EP automatically sets the requested performance. More importantly, it allows users to reduce their overall test costs by only paying for the performance they need, when they need it.
New Flash 750
Introduced earlier this year at SEMICON Europa, the FLASH 750 is an integrated test cell which features a new architecture to reduce the cost of test for flash memory. The new test system is the first flash memory tester with the capability of testing 32 devices in parallel for cell phone NOR flash devices. The system is an innovative high-volume manufacturing solution that delivers the lowest cost of ownership and highest throughput for today's cell phone flash while providing up to 100 MHz performance for advanced probe testing.
About ARIES
The ARIES Memory Test System will showcase high-performance device testing at the lowest cost to test. See how the ARIES High-speed RAM system, which operates at data rates to 1.0 Gbit/second while testing up to 16 devices in parallel, is the system of choice for testing the newest generation of devices such as High-bandwidth RAMs, Direct Rambus DRAMs, SLDRAMs, and fast SSRAMs.
About Teradyne
Teradyne is the world's largest supplier of automatic test equipment and related software for the electronics and telecommunications industries and a leading supplier of high-performance backplane assemblies and connectors. Teradyne supports its products through an extensive service and applications engineering network, with technical centers located throughout the United States, Europe, and the Pacific Rim. Headquartered in Boston, Massachusetts, Teradyne reported sales of approximately $1.8 billion in 1999 and currently has more than 8,500 employees worldwide. Teradyne's World Wide Web address is www.teradyne.com.
IMAGE and Real Time Enabling are trademarks of Teradyne, Inc.
“J750 sales in the fabless/subcontractor market currently represent the fastest growing segment of our business. The INTEGRA J750 strengthens Teradyne's broad line of semiconductor test equipment and reinforces our commitment to support the contract manufacturers and fabless semiconductor companies worldwide.”

