The J973EP VLSI Test System, recently introduced in July, is the first VLSI test system to provide 1.6 GTS Differential Bus Test capability and the first to expand performance with a 200A Device Power Supply. The expanded performance of the new J973EP test system enables manufacturers to shift, in real time, between structural and full-performance test -- or balance both types of test.
The J973EP expands the performance curve on: accuracy, precision device power and differential bus testing. The new test capabilities of the J973EP will be demonstrated at the International Test Conference (ITC) held here, Oct. 3-6, 2000.
As a result of developing new higher speed bus technologies, manufacturers testing high-performance devices are facing three distinct challenges: higher bandwidth, higher integration and increased power consumption.
The new J973EP Differential Bus Test Option and 200A Device Power Supply provide a solution for rapidly evolving bus test challenges. The J973EP combines 1.6GTS of differential bus test speed with 200A of device power for a full spectrum of stable high-performance test, the bus test capability that designers and manufacturers of microprocessors, core logic, integrated processors and DSPs require.
"Bus architectures in the microprocessor industry have increased in speed from 133 MHz to 1.6 GHz. The faster bus protocols have created new types of timing faults which require more performance testing to detect," said Wayne Ponik, Marketing manager of Teradyne's VLSI Test Division.
"The J973EP Differential Test Option and 200A GVS, in response to industry demand, supplies a solution by providing the performance and accuracy to debug, characterize and production test differential buses," continued Ponik.
J973EP Differential Test Option
The J973EP Differential Test Option provides a 1.6GT differential drive and receives channel-based resource to provide the highest quality of differential test. The signals are generated, compared and processed in a differential environment without compromising performance test.
The industry's first true 1.6GT differential drive and receive hardware for bus testing on a high performance VLSI test system provides timing margin for full at-speed characterization and production test. The J973 Differential Test Option employs the High Speed Clock option to allow independent programming of device clock frequencies.
200A Ganged Voltage Source (GVS) Option
The J973EP 200A Ganged Voltage Source (GVS) provides characterization of high-performance processors operating at high current levels. The exceptional voltage accuracy of the GVS allows devices to run at higher operating speeds resulting in improved yields.
Located in the test station, near the device-under-test, the GVS responds to high current loads with superior dynamic performance. Pause times can be reduced during the device power-up sequence, resulting in shorter test times and lower cost of test.
Pricing and Availability
North American pricing for the Differential Test Option is based upon system configuration. North American pricing for the 200A Ganged Voltage Source option starts at $237,000. The Differential Option shipments begin in 2001 and GVS test options will be shipping in the first quarter of 2001.
About Teradyne
Teradyne is the world's largest supplier of automatic test equipment (ATE) and associated software for the electronics and telecommunications industries with 1999 sales exceeding $1.8 billion and more than 8,500 employees worldwide.
Teradyne products are used to test semiconductors, circuit assemblies, telephone lines, networks, computerized telephone systems and software.
Teradyne is also a leading supplier of backplane assemblies and high-density connectors used in high-performance electronic systems in communications and computing. More than 70 percent of the company's business is driven by Internet growth. Teradyne's Web address is www.teradyne.com.
“Bus architectures in the microprocessor industry have increased in speed from 133 MHz to 1.6 GHz. The faster bus protocols have created new types of timing faults which require more performance testing to detect”

