Subcontract Manufacturers Get There First -- with Teradyne`s Broad Product Line and Commitment to IC Manufacturing Organizations

TAIPEI, Taiwan--(BUSINESS WIRE)--Sept. 13, 2000--

Several New Test Products Slated to Make SEMICON Taiwan Debut

Teradyne, Inc. (NYSE: TER) today announced at SEMICON Taiwan that its investment in Taiwan and Taiwan's fabless and subcontract manufacturing organizations is greater than ever. To demonstrate that commitment, Teradyne is showcasing its broad product line of automatic test equipment (ATE) and instrumentation suites for semiconductor development and production (See Booth 532) at SEMICON Taiwan this week. Teradyne's Taiwan Field Operation Manager, SI Wei, said, "Teradyne's sales in the fabless/subcontract market currently is the fastest growing segment of our business." Teradyne has recently announced orders from OSE GT, KingYuan, UMC, ASET, Winstek and TSMC. Wei also noted that Teradyne has the broadest product line of any ATE manufacturer in the world.

Teradyne's products are especially suited for the fabless, foundry and subcontractor test market employing leading-edge technology to provide economical and highly efficient parallel test solutions. The semiconductor ATE being highlighted at SEMICON Taiwan include the INTEGRA J750 VLSI test system, the FLASH 750 Memory test system, the Catalyst test system - along with the newest member of the Catalyst Family - the Catalyst Tiger test system, the ARIES High-speed RAM test system, and the J973EP High-performance VLSI test system. At subcontract facilities, approximately 800 Teradyne semiconductor test systems are installed worldwide.

About INTEGRA J750

The INTEGRA J750 delivers up to 1,024 digital channels into a zero footprint system entirely contained within a test head. Its high-throughput parallel testing capabilities help deliver 95% parallel test efficiency for up to 32 devices. The system also features IG-XL test software, the semiconductor ATE industry's first test development suite combining the power and performance of the latest PC technology and Windows NT operating system with the familiarity of standard Windows productivity tools, like Microsoft Excel and Visual Basic. Its small footprint and high parallel test throughput provides the most economical approach to testing complex VLSI devices with embedded memory and analog cells.

New Flash 750

Introduced for the first time in Taiwan, the FLASH 750 is an integrated test cell which features a new architecture to reduce the cost of test for flash memory. The new test system is the first flash memory tester with the capability of testing 32 devices in parallel for cell phone NOR flash devices. The system is an innovative high-volume manufacturing solution that delivers the lowest cost of ownership and highest throughput for today's cell phone flash while providing up to 100 MHz performance for advanced probe testing.

About Catalyst

Catalyst continues to be the first choice in SOC test capability for DSL, wireless, microwave, and power management applications as well as the economic leader, introducing parallel SOC test. When a cell call is placed, or a PC, printer, scanner, pager, or a DVD is utilized, Catalyst tested ICs make it happen.

New Catalyst Tiger

Catalyst Tiger is the first over 1 Gbps SOC test system. Extending the Catalyst Family, Tiger shares the same high throughput zero-time DSP architecture, IMAGE(TM) software, and state-of-the-art analog instrumentation and extends the Catalyst family to 1024 digital pins. Powered by breakthrough Silicon Germanium (SiGe) technology, Tiger sets a new digital performance standard with full I/O data rates to 1.6 Gbps while retaining the timing flexibility at top speed demanded by chipset and network processing applications.

About ARIES

The ARIES Memory Test System will showcase high-performance device testing at the lowest cost to test. See how the ARIES High-speed RAM system, which operates at data rates to 1.0 Gbit/second while testing up to 16 devices in parallel, is the system of choice for testing the newest generation of devices such as High-bandwidth RAMs, Direct Rambus(TM) DRAMs, SLDRAMs, and fast SSRAMs.

New J973EP

Introduced at SEMICON West last July, the J973EP is the only VLSI System for structural to full-performance testing. The J973EP enables microprocessor, core logic, and DSP manufacturers to swiftly shift, in real-time, between full-functional and structural test or balance both types of test. This new VLSI test system provides the full range of test capability, from low cost DFT testing to full performance functional testing without having to change hardware or install upgrades in the system. Real Time Software Enabling provides manufacturers with the capability to dial-up a test configuration and the J973EP automatically sets the requested performance. More importantly, it allows users to reduce their overall test costs by only paying for the performance they need, when they need it.

About Teradyne

Teradyne is the world's largest supplier of automatic test equipment and related software for the electronics and telecommunications industries and a leading supplier of high-performance backplane assemblies and connectors. Teradyne supports its products through an extensive service and applications engineering network, with technical centers located throughout the United States, Europe, and the Pacific Rim. Headquartered in Boston, Massachusetts, Teradyne reported sales of approximately $1.8 billion in 1999 and currently has about 8,000 employees worldwide. Teradyne's World Wide Web address is www.teradyne.com.

IMAGE and Direct Rambus are trademarks of Teradyne, Inc.

“Teradyne's sales in the fabless/subcontract market currently is the fastest growing segment of our business.”