New J973EP VLSI Test System with Expanded Performance And Real Time Enabling Provides Choice of Test Methodology The Only All-Terrain System for Structural to Performance Testing

SAN JOSE, Calif.--(BUSINESS WIRE)--July 12, 2000--Teradyne, Inc. (NYSE: TER) unveiled the J973EP VLSI Test System. The J973EP enables microprocessor, core logic, and DSP manufacturers to shift in real-time between full functional and structural test or balance both types of test. This new VLSI test system provides the full range of test capability, from low cost DFT testing to full performance functional testing without having to change hardware or install upgrades in the system. Real time software enabling provides manufacturers with the capability to select a test configuration and the J973EP sets the requested performance. More importantly, it allows users to reduce their overall test costs by only paying for the performance they need, when they need it. The J973EP is being demonstrated at the industry tradeshow Semicon West held here July 12-14, 2000.

Device densities for advanced microprocessor chips have exceeded 20 million transistors. The effort and time required generating functional test patterns to ensure the necessary fault coverage for these devices has grown exponentially. A cost-effective alternative for achieving high fault coverage is the utilization of automated pattern generation software that creates structural test patterns. Not only can the patterns be generated quickly, but the test equipment used can be simpler and lower cost.

In addition to these continued device density increases, the bus architectures in the microprocessor industry have increased in speed from 133 MHz to over 1.5 GHz. The faster bus protocols have created new types of timing faults that require more performance than structural testers provide. The J973EP provides a solution with the ability to reconfigure the system from a low-cost structural configuration to a full-performance functional configuration, thereby achieving the needed balance of test methodologies. Manufacturers will benefit from this balanced test capability in three key stages of the test flow: product development (validation), wafer test, and package test. At each stage, the J973EP can be instantly reconfigured if required while maintaining test program compatibility.

"The semiconductor market is demanding a lower cost of test. They want one system that will leverage test programs for characterization and manufacturing. In addition, they can't afford the time and expense of swapping out test equipment hardware on their floor as their performance requirements change," said Wayne Ponik, Marketing Manager of Teradyne's VLSI Test Division. "The J973EP, in response to industry demand, supplies a solution by providing a low cost structural system with the capability of turning-on-performance as the customer's test needs require. The one-system approach of enabling hardware and software simplifies the transition to new test configurations which is critical as manufacturers are faced with testing rapidly evolving technologies. The J973EP is a test vehicle that allows manufacturers to quickly respond to all test terrains. Tomorrow's test configuration will be different than today's," continued Ponik.

Until now, semiconductor manufacturers have needed to purchase multiple test platforms to implement both low cost structural testing and high performance functional testing. With the J973EP, customers can start with a low-cost structural configuration and achieve the highest overall performance available in any VLSI test system without having to replace the initial hardware that's delivered to them. Real Time Enabling allows immediate access to the required performance.

Performance

Improved edge placement accuracy of up to +/-100ps can be software enabled. The J973EP Precision Device Power Source will provide up to 200 Amps of current with 5 micro seconds response time, <50mV of voltage droop, and <1% voltage accuracy. The Precision Device Power Source used on the J973 has already proven that an accurate, stable device source results in higher operating speeds for the device being tested.

Performance options currently available on the J973 (such as the Memory Test, Scan Test, and Time Digitizer options) will also operate on the J973EP. In addition, a new option currently under development will provide high-speed differential testing for device busses.

Pricing and Availability

J973EP VLSI Test System deliveries will begin in the first quarter of 2001 to major performance IC manufacturers such as AMD. Starting prices are under $1M.

About Teradyne

Teradyne is the world's largest supplier of automatic test equipment and related software for the electronics and telecommunications industries and a leading supplier of high-performance backplane assemblies and connectors. Its products and services address the test requirements of a broad range of semiconductors, electronic assemblies, telephone access networks and software applications. Teradyne supports its products through an extensive service and applications engineering network, with technical centers located throughout the United States, Europe, and the Pacific Rim. Headquartered in Boston, Massachusetts, Teradyne reported sales of approximately $1.8 billion in 1999 and currently has approximately 8,000 employees worldwide. Teradyne's World Wide Web address is http://www.teradyne.com.

“The semiconductor market is demanding a lower cost of test. They want one system that will leverage test programs for characterization and manufacturing. In addition, they can't afford the time and expense of swapping out test equipment hardware on their floor as their performance requirements change”