True Circuits Announces New Line of General Purpose PLLs Optimized for Low Power, Area Sensitive and Low Cost Applications

LOS ALTOS, Calif.--(BUSINESS WIRE)--True Circuits, Inc. (TCI), a leading provider of analog and mixed-signal intellectual property (IP) for the semiconductor, systems and electronics industries announced today the immediate availability of a new line of silicon-proven General Purpose Phase-Locked Loop (PLL) hard macros that are well suited for system clock, DDR and general purpose timing applications. The General Purpose PLL is available in a variety of TSMC and GlobalFoundries processes. It is designed as a low power, small size and wide range clock multiplier with deskew capability that delivers optimal jitter performance over all multiplication settings, and is ideal for low power, area sensitive and low cost applications.

“We have been listening carefully when our customers and partners explain the cost and margin pressures they experience everyday in managing their product lines”

Fabless customers and IDMs around the world have come to True Circuits over the last 12 years for high performance, high functionality PLLs and DLLs to fully differentiate their products in the marketplace. While True Circuits is proud of its heritage as a technology leader and will continue to serve the high performance segment of the market, it recognizes that many chip applications do not require this degree of functionality, and some are quite power, area and cost sensitive. In the past, designers of these chips often had to settle for point solution PLLs from foundries or other vendors, or accept marginal PLLs thrown in as part of packaged IP licenses to keep total IP costs to a minimum. True Circuits has decided to introduce the General Purpose PLL at a low price to enable any customer to obtain a quality, low-jitter, wide range PLL for considerably less than they are currently paying for lesser PLL IP available in the marketplace. As with all timing IP from True Circuits, the General Purpose PLL has been extensively characterized and silicon validated and is available in a variety of TSMC and GlobalFoundries processes from 130nm to 28nm.

"We have been listening carefully when our customers and partners explain the cost and margin pressures they experience everyday in managing their product lines," remarked Stephen Maneatis, True Circuits, CEO. "At the same time, they acknowledge how important quality, performance and availability are in the IP that they source. For a company that has always led with technology, we are excited to be able to introduce a new PLL to the marketplace that provides our customers with a nice mix of performance and features at a very attractive price."

About True Circuits PLLs and DLLs

True Circuits offers a complete family of standardized and silicon-proven general purpose, clock generator, deskew, low bandwidth and spread spectrum PLLs and DDR DLLs that spans nearly all performance points and features typically requested by ASIC, FPGA and SoC designers. These high quality, low-jitter PLL and DLL hard macros are suited to a wide variety of interface standards and chip applications. They are pin-programmable, highly process tolerant and reusable. They are also easy to integrate and are fully supported, so customers can reduce both design and silicon risks.

True Circuits PLLs are available in a range of frequencies, multiplication factors (1-4096), sizes and functions over which they deliver optimal performance, avoiding the cost and complexity of licensing multiple point-solution PLLs from foundries or other vendors. TCI's DLLs are available in multi-slave and multi-phase versions and delay a set of signals by precise and adjustable fractions of a reference clock cycle independent of voltage and temperature, are ideal for high-speed DDR interface applications and are available in different sizes and form factors. Customized PLL and DLL solutions are also available for specialized chip applications.

True Circuits PLLs and DLLs are available for immediate customer delivery in TSMC, GlobalFoundries, UMC and Common Platform processes from 180nm to 28nm. For more information about True Circuits IP products, visit www.truecircuits.com/tci_technology.html and www.truecircuits.com/product_matrix.html.

Price and Availability

True Circuits General Purpose PLLs are available for immediate customer delivery in TSMC processes from 130nm to 28nm and GlobalFoundries processes from 130nm to 65nm. Customers can license its timing IP either directly from TCI or through its global network of design services partners and sales reps. The hard macros are available for a per use license fee and no royalty fees. The license fee includes integration support from TCI or its partners to ensure a successful customer tape out. The deliverables include GDSII and LVS Spice netlists, behavioral and synthesis models, Library Exchange Format (LEF) files and extensive user documentation.

About True Circuits

True Circuits develops and markets a broad range of industry leading PLLs, DLLs and other mixed-signal hard macros for ICs for the semiconductor, systems and electronics industries. TCI's robust state-of-the-art circuits, methodical and proven design strategy, and close association with the world's leading fabs, IDMs, and design services companies allow the company to quickly and reliably create new and innovative designs in a variety of advanced process technologies. Over the last 12 years, True Circuits has distinguished itself as the technology leader in the timing IP space, and its PLLs and DLLs are used extensively around the world in its customers' products with production volumes now in the billions.

True Circuits is headquartered at 4300 El Camino Real, Suite 200, Los Altos, California 94022 and can be found on the web at www.truecircuits.com. Product inquiries can be made by calling the company directly at [phone] or via e-mail at [e-mail].

Acronyms and definitions:
ASIC	Application Specific IC	IP	Intellectual Property
DLL	Delay-Locked Loop	IC	Integrated Circuit
FPGA	Field Programmable Gate Array	SoC	System on a Chip
PLL	Phase-Locked Loop

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