SANTA CLARA, Calif.--(BUSINESS WIRE)--Legend Design Technology, Inc. today announced that its industry leading automatic memory characterization product, CharFlo-Memory!, has been upgraded with new capabilities which dramatically increase the tool's performance. The new release addresses “dynamic and static extracting” of critical-path circuits by using the company's “fast-spice” simulator, Turbo-MSIM, and “intelligently reusing” pre-characterization states for shorter simulation time. In addition, Legend’s patented characterization technology will be extended to custom memory and macro IP.
With an emphasis on productivity and performance, Legend's CharFlo-Memory! revolutionizes the time consuming and error prone processes associated with memory characterization. Having been adopted by major foundries, IDMs and fabless design companies with numerous silicon-proven cases, CharFlo-Memory! has performed the reliability checks against signal integrity (e.g. glitch and meta-stability etc.) and noise-margin for high silicon yields. To reduce the layout extraction time in characterization flows, CharFlo-Memory! provides the unique function of having layout parasitic extraction executed on critical path circuits only. As for the power gating designs popularly used in nanometer technology, CharFlo-Memory! can produce very small critical-path circuits while addressing all dynamic characteristics.
For “dynamic extracting” of critical-path circuits, CharFlo-Memory! has been successfully enhanced utilizing Legend’s “fast-spice” simulator, Turbo-MSIM, with the stimulus to reduce the circuits for throughputs. Even for a large memory circuit, CharFlo-Memory! efficiently extracts the accurate and small critical-path circuits with dynamic loadings. In addition, Legend’s “fast-spice” simulator, Turbo-MSIM, has the capabilities of not only quickly locating ‘active’ nodes during the simulation, but also efficiently executing a large number of measurements which enables “Dynamic extracting.”
For “static extracting” of critical-path circuits, CharFlo-Memory! provides multiple methods in the “tool box”. For characterizing the setup and hold time, the first-level flip-flop may not be the correct reference for probing, which highly depends on the type of dynamic design. CharFlo-Memory! has incorporated multiple kinds of references, from the simple first-level flip-flop to the safe memory-cell inside, to automatically locate the correct reference for probing.
“For 45nm technology and below, the device model becomes more complex and simulation time gets much longer. Through the “dynamic and static extracting” of critical-path circuits and “intelligently reusing” pre-characterization states, CharFlo-Memory! has been able to demonstrate performance improvements as high as 10X,” said Dr. You-Pang Wei, Legend’s president and CEO. “We are fully committed to provide the best solution for the highest quality and performance in the semiconductor IP characterization market.”
Legend Design Technology Inc. is a leading provider of circuit simulation and semiconductor IP characterization and verification software for SoC designs.
For more information, visit www.LegendDesign.com.